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ELC806: PLC

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    TEST1 PLC revision
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  • * What logic gates does the PLC ladder program shown in figure represent ?
    NOR gate
    OR gate
    AND gate
    NAND gate
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  • * What logic gates does the PLC instruction program shown in figure represent ?
    NAND gate
    AND gate
    NOR gate
    OR gate
  •  15
  • * The missing instruction in the table address number 2 is
    OR
    LD
    ORI
    AND
  •  15
  • * The missing instruction in the table address number 3 is
    OR
    ORI
    LD
    AND
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  • * The missing instruction in the table address number 4 is
    LD
    OUT
    OR
    AND
  •  15
  • * The missing Data in the table address number 2 is
    X3
    X2
    Y0
    X1
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  • * The missing Data in the table address number 3 is
    X2
    Y0
    X1
    X3
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  • * The missing Data in the table address number 4 is
    Y0
    X2
    X3
    X1
  •  15
  • * What logic gates does the PLC ladder program shown in figure represent ?
    OR gate
    NOR gate
    NOT gate
    AND gate
  •  15
  • * What logic gates does the PLC ladder program shown in figure represent ?
    AND gate
    NAND gate
    NOR gate
    OR gate
  •  15
  • * What logic gates does the PLC timing diagram shown in figure represent ?
    NAND gate
    AND gate
    Buffer gate
    NOR gate
  •  15
  • * What logic gates does the PLC ladder program shown in figure represent ?
    AND gate
    NOR gate
    NOR gate
    NAND gate
  •  15
  • * What logic gates does the PLC ladder program shown in figure represent ?
    AND gate
    NOR gate
    NOT gate
    NAND gate
  •  15
  • * The abbreviation of PLC is?
    Programming logic counter
    Programming ladder counter
    Programmable logic controller
    Programmable ladder controller
  •  15
  • * Programmable Logic Controller (PLC) uses one of the programming languages is
    Relay Ladder Logic
    Programmable Control Logic
    Relay Controller Logic
    Combinational gate Logic
  •  15
  • * What are the three main sections of a PLC?
    Monitor contact and input / output circuit
    CPU sensor and external relay
    Memory external relay and contact
    CPU memory and input / output circuit
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